On-chip global interconnect delay tends to increase with successive technology generations. For high-speed on-chip interconnects, dynamic buses have been able to reduce interconnect delays over static buses. The Miller coupling factor (MCF), which determines the effective coupling capacitance to neighboring wires, reduces from a worst-case of 2 for static buses to 1 for dynamic buses, thus reducing the interconnect delay. FIG. 1 is a block diagram illustrating a pipeline stage consisting of a typical dynamic bus topology.
However, with scaling even dynamic bus fails to satisfy the ever increasing demands for high performance. Moreover, dynamic buses tend to consume significant power even at low input switching activities commonly seen in microprocessor buses. Since dynamic buses are pre-charged every clock cycle, the power consumption remains high even when there is no input switching activity. The aggressively sized repeaters normally inserted along the dynamic bus further degrade power numbers.
Current sensing has been proposed as a high performance circuit technique. FIG. 2 is a block diagram illustrating a typical interconnect using the conventional current-sensing technique. FIG. 3 is a block diagram illustrating a receiver circuit that can be used in the interconnect shown in FIG. 2. The main difference between current-mode and voltage-mode signaling is the termination of wire. In current sensing, the line is terminated by a short, thus shunting the wire capacitance. By avoiding the charging of the wire capacitance, a current-sensing system is faster and can save power.
The current-sensing receiver works as follows. Referring to FIG. 3, initially, on assertion of the CLK signal, two outputs, OUT and OUTB, equalize by transistor M8. Equal amounts of current flow through the two legs of the sense amplifier. A differential current applied to IN and INB breaks the metastable balance, and when CLK is de-asserted the cross-coupled latch (M1–M4) switches thus giving a voltage output determined by the differential current between IN and NB. Transistors M5 and M6 provide the low impedance termination.
Although the current-sensing technique shown in FIGS. 2 and 3 provides higher performance, it suffers from two major drawbacks: it is differential in nature and hence needs double the wires than the conventional dynamic bus. Moreover, such a current sensing suffers from static power dissipation and thus makes it power inefficient for low-activity buses.